Document Type : Research Article


Computer Science and Engineering Department, Shahid Beheshti University, Tehran, Iran


FPGA platforms have been widely used in many modern digital applications due to their low prototyping cost, short time-to-market and flexibility. Field-programmability of FPGA bitstream has made it as a flexible and easy-to-use platform. However, access to bitstream degraded the security of FPGA IPs because there is no efficient method to authenticate the originality of bitstream by the FPGA programmer. The issue of secure transmission of configuration information to the FPGAs is of paramount importance to both users and IP providers. In this paper we presented a "Self Authentication" methodology in which the originality of sub-components in bitstream is authenticated in parallel with the intrinsic operation of the design. In the case of discovering violation, the normal data flow is obfuscated and the circuit would be locked. Experimental results show that this methodology considerably improves the IP security against malicious updates with reasonable overheads.


[1] S. M. Trimberger, Jason J. Moore, "FPGA security: Motivations, features, and applications", Invited paper in Proceedings of the IEEE, Vol. 102, Issue 8, pp. 1248 - 1265, Aug. 2014.
[2] R. S. Chakraborty, I. Saha and A. Palchaudhuri, "Hardware Trojan insertion by direct modification of FPGA configuration bitstream", In IEEE Design and Test, Vol. 30 Issue 2, pp. 45-54, 2013.
[3] J. Note and E. Rannaud, "From the bitstream to the netlist", In proceedings of the 16th international ACM/SIGDA symposium on Field programmable gate arrays (FPGA'08), pp. 264, 2008.
[4] P. Swierczynski, M. Fyrbiak and C. Paar et al, "FPGA Trojans through Detecting and Weakening of Cryptographic Primitives", In TCAD. pp. 1-13, 2015.
[5] T. H. Vu and N, V. Cuong, "A framework for secure remote updating of bitstream of runtime reconfigurable embedded platforms", In Communications and Electronics (ICCE), pp. 471 - 476, 2012.
[6] A. Moradi, A. Barenghi and C. Paar, "On the vulnerability of FPGA bitstream encryption against power analysis attacks", In ACM Conference on Computer and Communications Security, pp. 111- 123, 2011.
[7] Y. Hori, T. katashita and A. Sasaki et. al, "Electromagnetic side-channel attack against 28-nm FPGA device", In Pre-proceedings of WISA, 2012.
[8] E. Mudler, P. Buysschaert and P. Delmotte, "Electromagnetic analysis attack on an FPGA implementation of an Elliptic curve cryptosystem", In Computer as a Tool (EUROCON), pp. 1879 – 1882, 2005.
[9] S. Trimberger, "Trusted design in FPGAs", In Proceedings of International of Design Automation Conference, pp. 5-8. 2007.
[10] S. Trimberger and J. Moore, "FPGA security: From features to capabilities to trusted systems", In Proc. 51st Annual Design Automation Conf., 2014.
[11] U. Farooq, H. Parvez, H. Mehrez, and Z. Marrakchi, "Exploration of heterogeneous FPGA architectures", In International Journal of Reconfigurable Computing , 2011 .
[12] J. Rose, J. Luu, and J.Goeders, "VTR 7.0: next generation architecture and CAD system for FPGAs", In ACM Transaction on Recongurable Technology and Systems (TRETS), Vol. 7, No. 2, 2014.
[13] J. Rajendran, H. Zhang, R. Karri et al, "Fault analysis-based logic encryption", In IEEE Transactions on computers, Vol. 64, No. 2, pp. 410-424, 2015.
[14] M. Hutton, D. Lewis, B. Pedersen, J. Schleicher, R. Yuan, G. Baeckler, A. Lee, R. Saini, and H. Kim, "Fracturable FPGA logic elements", Technical Report, Available on http://www. altera. Com/literature/cp/cp-01006.pdf, 2006.
[15] U. Farooq, Z. Marrakchi, H. Mehrez, "Tree-based Heterogeneous FPGA Architectures", Springer 2012.