TY - JOUR ID - 118140 TI - Hardware Trojan Prevention and Detection by Filling Unused Space Using Shift registers, Gate-chain and Extra Routing JO - The ISC International Journal of Information Security JA - ISECURE LA - en SN - 2008-2045 AU - Labbafniya, Mansoureh AU - Etemadi Borujeni, Shahram AU - Saeidi, Roghaye AD - Faculty of computer engineering, University of Isfahan, Isfahan, Iran AD - Faculty of ICT security Department, ICT research Institute, Tehran, Iran Y1 - 2021 PY - 2021 VL - 13 IS - 1 SP - 47 EP - 57 KW - Controllable point KW - Field Programmable Gate Array KW - hardware Trojan horses KW - Observable points KW - Security DO - 10.22042/isecure.2020.215265.510 N2 -  Nowadays the security of the design is so important because of the different available attacks to the system. the main aim of this paper is to improve the security of the circuit design implemented on FPGA device. Two approaches are proposed for this purpose. The first is to fill out empty space using flip-flops and LUTs so that there is no available space for inserting a hardware Trojan. We name this filling structure as Gate-chain. The second approach increases the security of the implemented design by identifying the low observable/controllable points of the main design and wiring them to the unused ports or the pre-designed Gate-chains. The proposed solutions not only prevent Trojan insertion but also increase the Trojan detection capabilities. Simulation results on Xilinx devices implementing different benchmarks show that the proposed method incurs dynamic power overhead just in test mode with less than one percent of delay overhead for critical path in normal mode. UR - https://www.isecure-journal.com/article_118140.html L1 - https://www.isecure-journal.com/article_118140_0c483964d2f8a6fbc7201eb7ebfee105.pdf ER -